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Advanced Computer Architectures Questions

  How many bits of storage are required for the tag array of 32-KB cache with 256-byte cache lines and four-way-set-associativity if the cache is write-back but does not require any additional bits of data in the tag array to implement the write-back policy? Assume that the system containing the cache uses 32-bit addresses.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Explain why poor load balancing leads to less than linear speedup.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Use IEEE single-precision floating point numbers to compute the following quantities:0.125*8
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Use IEEE single-precision floating point numbers to compute the following quantities:13.25 + 4.5
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Give two examples of problems that could occur if a computer allowed user programs to access I/O devices directly, rather than requiring them to go thrugh the operating system.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Explain in detail how Direct Memory Access system works by taking a suitable example showing the various stages.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Discuss Booth Multiplication algorithm with the help of suitable example.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  How many characters per second can be transmitted over a 1200-baud line in each of the following modes considering a character code of 8-bit:Asynchronous serial transmission with 2 stop bit.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  How many characters per second can be transmitted over a 1200-baud line in each of the following modes considering a character code of 8-bit: Synchronous serial transmission
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  A computer uses RAM chips of 1024 x 1 capacity. How many chips are needed and how many should their address lines be connected to provide a memory capacity of 1024 byes? Also explain in words how the chips are to be connected to the address bus.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Give an overview of 8255 programmable ports.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the significance of LINPPACK benchmark specifications?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What do you mean by Programmed I/O Concept?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  How is virtual memory useful in memory hierarchy?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Give two examples of program control instructions.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the difference between micro code and micro instruction?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Explain the meaning of the memory-reference instruction BUN
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Perform the subtraction with the following unsigned binary number by taking the 2s complement of the subtrahend 11010- 11111.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the role of Binary Counters in digital computers?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Give the layered view of a computer system.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Define the terms I/O processor & I/O controller.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Convert the following logic function into minterm: ABCDEF + ABCEEF + ABCDEF + ABCDEF + ABCDEF
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the result of the following operations when executed on a 8-bit processor that uses a 2s complement representation for negative integers?ASH -23, -2
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the result of the following operations when executed on a 8-bit processor that uses a 2s complement representation for negative integers?LSH -23, -2
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the result of the following operations when executed on a 8-bit processor that uses a 2s complement representation for negative integers?ASH 17, 5
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  What is the result of the following operations when executed on a 8-bit processor that uses a 2s complement representation for negative integers? ¬†LSH 14, 3
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  How does pipelining improve performance?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  A DMA controller transfers 16-bit words to memory using cycle staling. The words are assembled from a device that transmits characters at a rate of 2400 characters per second. The CPU is fetching and executing instructions a an average rate of 1 million instructions per second. By how much will the CPU be slowed down because o the DMA transfer?
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Why are benchmark programs used to measure computer performance and also explain why we need multiple benchmarks instead of using only one best benchmark program.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

  Explain in detail the working of Booth Multiplication algorithm with the help of a suitable example and the flow chart. Also mention the register configuration for hardware implementation of he algorithm.
(class: BE/BTech - Computer Science )    Advanced Computer Architectures

    

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